System on Chip (“SoC”) computing solutions have progressively become a very attractive option for meeting the design requirements imposed by computing customers, while maintaining a low time-to-market development timeline. For example, SoC computing solutions are often utilized in the integrated circuit (“IC”) market. As the IC market continues to expand, so do the number of vendors utilized in the development and manufacturing of SoC computing solutions and the number of end users. As such, exposure of intellectual property (“IP”) used in the development to these vendors and used in the end-products used by the users also increases. The vendors and users may be located around the world, potentially resulting in global exposure of the underlying IP utilized in the SoC computing solutions.
The globalized nature of the SoC market enables an ecosystem consisting of both trusted and untrusted IP owners and users, as well as legitimate and malicious users. IP theft accounts for approximately 62% of cybercrime damages, while many analysts concur that the extent of IP stolen in reality cannot be currently measured with confidence. IP reverse engineering by malicious and untrusted users has also emerged as a major concern for IP owners, as adversaries possess increasingly sophisticated tools for revealing the IP of a given SoC, such as design secrets and manufacturing methods.
A prominent phase in the SoC design cycle that requires close collaboration between the IP vendor and the IP user, is the verification of the core of the SoC. Verification tools vary from simple implementations that target specific types of processors, to methodologies that can be applied to mixed software and hardware descriptions (e.g., System C verification). While recent work has focused on advanced verification methods, such as model checking and equivalence checking, verification using simulation methods still remains the preferred method to verify that a produced SoC is produced in accordance with the IP of the SoC designer. Such a verification typically requires the exposure of the IP by the SoC designer, which may result in IP misappropriation by the vendor or the end user.